1. Field of the Invention
The present invention generally relates to a thin-film transistor to be used to drive liquid crystals in an active matrix liquid crystal display (LCD) and more particularly, to a thin-film transistor having offset regions.
2. Description of the Prior Art
Thin-film transistors intended for application to planar display devices and other image display devices have been actively researched and developed these days. The thin-film transistors to be used in active matrix LCDs or other display devices are required to have characteristics such as high mobility, high ratio of the ON current to the OFF current, high resistance to electric voltage, and ability of reducing the device size.
Polycrystalline semiconductor thin-film transistors have merits of high performance and high reliability, but they also have a demerit that high temperatures are required in the film formation, when compared to transistors using an amorphous semiconductor film. Thus, there have been many researches and applications of techniques of crystallizing amorphous semiconductor films into polycrystalline semiconductor films through irradiation of laser and without using a high-temperature process.
FIG. 1 shows a sectional view of a conventional thin-film transistor using a polycrystalline semiconductor film and FIGS. 2A, 2B, 2C, 2D, 2E, 2F, 2G and 2H show steps of a fabrication process for the transistor shown in FIG. 1. The following describes the fabrication process with reference to these figures. First, an amorphous semiconductor (a-Si) film 62a is formed on a glass substrate 61 as shown in FIG. 2A. Then the amorphous semiconductor film 62a is patterned and partially irradiated with the excimer laser, so that part of the amorphous semiconductor film 62a is made to grow into a polycrystalline semiconductor (P-Si) film 62b and only that part is left as shown in FIG. 2B. Thereafter, a gate insulation film 63 and a metal film 64A are formed as shown in FIG. 2C. The metal film 64A is then patterned to become a gate electrode 64, and thereafter impurity ions are implanted into the polycrystalline film 62b, using the gate electrode 64 as a mask, as shown in FIG. 2D. As a result, a source region 66a and a drain region 66b are formed as shown in FIG. 2E. Subsequently, partial irradiation of the substrate with the excimer laser is performed to activate and thereby infuse the ions. Next, an interlayer insulation film 65 is formed and the simultaneous patterning of the interlayer insulation film 65 and the gate insulation film 63 is performed to form contact holes as shown in FIG. 2F. Thereafter, a metal film is formed and patterned into a source electrode 67 and a drain electrode 68 as shown in FIGS. 2G and 2H. Finally, a picture element electrode 69 having a specific pattern is formed of a transparent conductive film such as an indium tin oxide (ITO) film. In this way, the conventional thin-film transistor of FIG. 1 is completed.
In a thin-film transistor formed using a polycrystalline semiconductor film, the ON current has a comparatively large value. However, because a lot of trap levels exist in the polycrystalline semiconductor film, a comparatively large amount of OFF current flows via the trap levels, disadvantageously. This deteriorates the data retaining capability. Therefore, it has been an urgent necessity to suppress the OFF current to a small value.
In order to impart a high ratio of the ON current to the OFF current and a high resistance to voltage to a thin-film transistor, trials have been made to reduce the OFF current by providing an offset region between each of the source and drain electrodes and the gate electrode and thereby relieving concentration of the field in the P-N junction formed between the source region and the drain region.
FIG. 3A is a plan view of a conventional polycrystalline semiconductor thin-film transistor having an offset gate structure. FIG. 3B is a cross sectional view taken along line 3B--3B of FIG. 3A. FIGS. 4A, 4B, 4C, 4D, 4E, 4F, 4G, 4H and 4I show steps of a fabrication process of the thin-film transistor shown in FIGS. 3A and 3B. The following describes the fabrication process with reference to these figures. First, an amorphous semiconductor (a-Si) film 52a is formed on a glass substrate 51 as shown in FIG. 4A. Then the amorphous semiconductor film 52a is patterned and partially irradiated with the excimer laser, so that the amorphous semiconductor film 52a is made to grow into a polycrystalline semiconductor (P-Si) film 52b, as shown in FIG. 4B. Thereafter, a gate insulation film 53 and a metal film 54a are formed as shown in FIG. 4C. The metal film 54a is then patterned to be a gate electrode 54. Thereafter, an ion implantation mask is formed of a photoresist film 1 and then impurity ions are implanted into the polycrystalline semiconductor film 52b from above the photoresist film 1, as shown in FIGS. 4D and 4E. As a result, a source region 56a and a drain region 56b are formed as shown in FIG. 4F. By removing the photoresist film 1 serving as the ion implantation mask, offset regions 50 are obtained, as shown in FIG. 4F. Subsequently, partial irradiation of the excimer laser, etc. is performed to activate and thereby infuse the ions. Next, an interlayer insulation film 55 is formed. The interlayer insulation film 55 and the gate insulation film 53 are patterned together into a specified configuration so that contact holes 2 are formed, as shown in FIG. 4G. Thereafter, a metal film is formed and patterned into a source electrode 57 and a drain electrode 58, as shown in FIGS. 4H and 4I. Finally, a picture element electrode 59 having a specific pattern is formed of a transparent conductive film such as an ITO film. In this way, the conventional thin-film transistor having offset regions, i.e., an offset gate structure, of FIGS. 3A and 3B is completed.
The fabrication process shown in FIGS. 4A-4I, however, requires a photolithographic step to form a photoresist film serving as an impurity ion implantation mask. This causes increase of the production costs. Furthermore, the photoresist film is disadvantageously hardened during the ion implantation process, so that the film is hardly detached or removed. The production process has a further problem that because the ion implantation is performed using the photoresist film as a mask, it is difficult to control the offset regions. Without a high alignment accuracy for the photolithography, the offset regions as expected would not obtained.
To solve the above problems, other methods of fabricating a thin-film transistor were invented, which are disclosed in, for example, JP-A-4-360580 and JP-A-4-360581.
FIGS. 7A, 7B, 7C and 7D show steps of a fabrication process equivalent to the fabrication process disclosed in JP-A-4-360580, and FIG. 5 shows a cross sectional view of a thin-film transistor produced by the fabrication process. Steps up to a step of forming a metal film for formation of a gate electrode 44 are the same as the steps shown FIGS. 4A-4C. After such steps, the metal film is patterned into the gate electrode 44, as shown in FIG. 7A. Then, impurity ions are implanted using the gate electrode 44 as a mask as shown in FIG. 7B, and a source region 46a and a drain region 46b are thus formed as shown in FIG. 7C. Then, the ions are activated and infused by the irradiation of the excimer laser. Next, surfaces of the gate electrode 44 are subjected to an anodizing process into an anodized film 3. The gate electrode 44 is thereby narrowed, so that offset regions 40 are formed as shown in FIG. 7D. Thereafter, an interlayer insulation film 45 is formed and patterned along with the gate insulation film 43 so that contact holes 2 are formed. Then, a metal film is formed and patterned into a source electrode 47 and a drain electrode 48. Finally, by forming a transparent conductive film 49, the thin-film transistor having offset regions as shown in FIG. 5 is obtained.
FIGS. 8A, 8B, 8C, 8D and 8E show steps of a fabrication process equivalent to the fabrication process disclosed in JP-A-4-360581, and FIG. 6 shows a cross sectional view of a thin-film transistor produced by the fabrication process. Steps up to a step of forming a metal film for formation of a gate electrode 34 are the same as the steps shown FIGS. 4A-4C. After such steps, the metal film is patterned by photolithography into the gate electrode 34. A photoresist film 1 used for the patterning of the gate electrode 34 is left on the gate electrode 34 as it is, as shown in FIG. 8A. Then, impurity ions are implanted using both the gate electrode 34 and the photoresist film 1 as a mask as shown in FIG. 8B, so that a source region 36a and a drain region 36b are formed as shown in FIG. 8C. Next, the sides of the gate electrode 34 are removed by wet-etching, with the photoresist film 1 being left on the gate electrode, as shown in FIG. 8D. As a result, the gate electrode 34 is narrowed and thereby offset regions 30 are formed, as shown in FIG. 8E. After the photoresist film 1 is removed, the implanted ions are activated and infused by irradiating the substrate with the excimer laser. Thereafter, an interlayer insulation film 35 is formed and patterned along with the gate insulation film 33 so that contact holes are formed. Then, a metal film is formed and patterned into a source electrode 37 and a drain electrode 38. Finally, by forming a transparent conductive film 39, the thin-film transistor having offset regions as shown in FIG. 6 is obtained.
In the thin-film transistor of FIG. 5 wherein the offset regions are formed by the anodizing process, the film thickness of the anodized film has a limit. More specifically, to get a sufficient width of the offset region, the anodized film should have an increased film thickness. If the film thickness of the anodized film is increased, however, the film thickness of the gate electrode will decrease accordingly and the electric current cannot flow well. Furthermore, because the anodized film is formed not only on the sides of the gate electrode but also on the top surface thereof, the interlayer film will have an increased film thickness and therefore there is a strong possibility that disconnection of the source electrode and the drain electrode take place. Furthermore, because the offset regions are formed through anodization of the gate electrode, the gate electrode is limited in material.
On the other hand, the thin-film transistor fabrication process shown in FIGS. 8A-8E has a problem that the photoresist film, which is the impurity ion implantation mask, is hardened during the ion implantation process, so that it becomes impossible to remove the film, as in the thin-film transistor fabrication process shown in FIGS. 4A-4I. In addition, removal of the sides of the gate electrode by wet etching requires a high-level technique. Therefore, it is difficult to control the offset regions.